1. Technical Field
Various exemplary embodiments of the present invention relate to a semiconductor technology and, more particularly, to a semiconductor memory apparatus and a semiconductor system.
2. Related Art
An electronic device includes many electronic elements, and a computer system includes many electronic elements comprising semiconductor apparatuses. A semiconductor memory apparatus among the semiconductor apparatus of the computer system may communicate with a host such as a processor, and may store and output data. The semiconductor memory apparatus may be classified into a volatile memory apparatus and a nonvolatile memory apparatus according to whether the semiconductor memory apparatus can retain data stored therein even when power supply is cut off. The volatile memory apparatus may include a static RAM (SRAM), a dynamic RAM (DRAM), and a synchronous DRAM (SDRAM). The nonvolatile memory apparatus may include a read only memory (ROM), a programmable ROM (PROM), an electrically erase and programmable ROM (EEPROM), an electrically programmable ROM (EPROM), a flash memory, a phase change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), and a ferroelectric RAM (FRAM).
The semiconductor memory apparatus may include a data storage region, which is referred to as a memory bank. Bit lines and word lines may be arranged in the memory bank. The memory bank may have memory cells arranged at cross-points between the bit lines and word lines. In general, the semiconductor memory apparatus may include a plurality of memory banks. A selected memory bank may selectively perform operations of storing data and outputting the data among the plurality of memory banks according to an operation mode. The semiconductor memory apparatus may have a data pad coupled to a data bus. The semiconductor memory apparatus may receive data provided from a host through the data pad. The semiconductor memory apparatus may output data to the host through the data pad. The semiconductor memory apparatus may have data line configured to transfer data between the data pad and the plurality of memory banks.